VLSI ENGINEER L3

VLSI Engineer L3 responsible for the development of VLSI system by defining functionalities, architecture, layout and implementation for a client, with duties including verification of modules/IP, creating verification environments and test benches (UVM), writing and reviewing code, executing and debugging test cases, conducting functional coverage analysis, and documenting test procedures for client delivery. Also responsible for client reporting and maintaining design change history, repository of design changes, time-sheets, and knowledge transfer. Requires experience with VLSI verification workflows, test bench development, IP scripting, and documentation tools (SharePoint/JIRA). Location: Shanghai office.