UCIe Applications Engineering Architect
On-siteSunnyvale, California, United States
Job Summary
Understand complex IIP applications across diverse customer SoCs, chiplet architectures, and system implementations. Provide expert guidance on challenging integration topics including simulation, synthesis, floorplanning, STA, DFT, package integration, silicon bring-up, validation, and system-level deployment. Lead technical reviews for highly complex customer programs and critical integration milestones. Partner closely with customer engineering leadership to resolve challenging integration and deployment issues. Collaborate with R&D teams to identify recurring customer challenges and recommend product enhancements that improve deployment success. Develop and promote technical methodologies, best practices, application notes, and deployment guidance across the Applications Engineering organization. Mentor and develop applications engineers across multiple projects and technology areas.
Required Qualifications
- at least 15 years of experience in design, verification, or applications
- deep expertise in ASIC Front-End or Back-End development
- broad understanding of SoC integration challenges
- strong analytical, reasoning, and problem-solving skills
- exceptional verbal and written communication skills
- recognized for your expertise in one or more key technology domains
- frequently relied upon for technical guidance on challenging integration and deployment topics
- excited about working with Synopsys' UCIe (Universal Chiplet Interconnect Express) IP
- ready to provide technical leadership for complex customer deployments
- contribute to integration methodologies and best practices
- help drive product improvements through deep understanding of customer requirements
- Some travel is required for this role
- Bachelor's and/or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields
- Deep expertise in ASIC Front-End or Back-End development and advanced SoC integration
- Recognized expertise in one or more domains such as UCIe, PCIe/CXL, high-speed interface integration, silicon validation, implementation, or post-silicon bring-up
- Demonstrated ability to influence technical direction through customer deployment experience and technical leadership
Desired Qualifications
- Extensive experience with advanced technology processes (10nm/7nm/5nm/3nm and beyond)
- Strong understanding of Die-to-Die, PCIe, CXL, and chiplet ecosystems
- Advanced silicon debug, validation, and hardware troubleshooting experience
- Broad knowledge of EDA methodologies including P&R, Physical Verification, Signal Integrity, and Power Integrity
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