Test Engineer
On-siteDelft, South Holland, The Netherlands
Job Summary
Develop and debug ATE test programs for wafer sort and final test while supporting silicon characterization and production qualification. Analyze test results to identify yield improvement opportunities and collaborate with Design and Product Engineering teams on root cause analysis for test failures. Contribute to test time optimization, implement digital test methodologies including SCAN and MBIST, and develop automation scripts to enhance efficiency. Support OSAT and manufacturing partners during product bring-up and production ramp, maintaining comprehensive test documentation. Requires five years of semiconductor test engineering experience and proficiency with ATE platforms like Teradyne and NI.
Required Qualifications
- Bachelor's degree in Electrical Engineering, Electronics Engineering, Semiconductor Engineering, or a related field
- Minimum five years of experience in semiconductor test engineering, product engineering, or a related role
- Semiconductor test development and production test flow experience
- Experience with semiconductor testing at wafer sort and/or package level
- Experience with embedded digital interfaces such as SPI, I2C, UART, SWD, and JTAG
- Understanding of digital test methodologies, including SCAN, MBIST, JTAG/Boundary Scan, IDDQ and Flash Memory Testing
- Experience with ATE platforms or test development environments such as NI and Teradyne IG-XL
- Programming or scripting experience in Python, C/C++, MATLAB, or similar languages
- Understanding of electronics fundamentals and digital circuit operation
- Strong analytical and problem-solving skills
- Good communication skills and the ability to work effectively in a diverse cross-functional team
- Experience with NI PXIe, Teradyne J750HD, or UltraFLEX platforms
Desired Qualifications
- Familiarity with data analysis tools (e.g MATLAB, JMP, or equivalent)
- Experience with ATPG and vector conversion flows using tools for production ATE implementation
- Knowledge of Design-for-Test (DFT) concepts, including Scan, MBIST, JTAG, Boundary Scan, and ATPG
- Experience working with OSATs in NPI and high-volume manufacturing environments
- Exposure to WLCSP products, wafer sort, and wafer-level development and testing methodologies
- Experience with test data analysis and yield monitoring tools
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