Staff Engineer, Digital Design Engineering
$134,644–$201,966 year
On-siteChelmsford, Massachusetts, United States
Job Summary
Develop FPGA-based designs for digital data and control paths leveraging ADI high-speed converters, including schematic, RTL, simulation, analysis, and interface validation. Define and develop system-level architectures for complex digital designs while leading technical teams on projects involving electronic warfare, communication, and phased array radar systems. Collaborate with staff across design, testing, manufacturing, and program management to drive new product development and performance verification. Engage directly with customers on technical requirements and influence product roadmaps, while mentoring engineers to develop technical talent. Requires deep expertise in RTL design, high-speed interface bring-up, and signal integrity, with 8+ years of experience in digital design engineering. U.S. citizenship required; 10% travel expected.
Required Qualifications
- Expert ability to define and implement complex digital system architectures
- Board level design, including part selection, schematic capture, debug, and optimization
- RTL design (Verilog, VHDL), simulation, timing closure in large FPGAs
- High speed interface design and bring-up and testing, e.g. 100 GigE, Aurora, PCIe
- Experience with schematic capture and PCB layout tools, e.g. Allegro, PADS
- Skilled in design techniques that maximize isolation and prevent signal integrity issues
- Strong organizational and communications skills with ability to work in a fast-paced & dynamic environment
- U.S. citizenship
- Ability to obtain a Secret Clearance
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent experience
- 8+ years of relevant experience in digital design engineering
- Experience with DOD radar, electronic warfare, or RF communications algorithms
- Familiarity with C#, Python, C/C++, TCL
- Familiarity with RF systems
- Experience with low complexity DC power tree designs and voltage sequencing
- 10% of the time travel
Desired Qualifications
- Familiarity with C#, Python, C/C++, TCL
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