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Staff DDR & HBM Validation Engineer

On-site · Bengaluru, Karnataka, India

Type
Full Time
Level
Senior Level
Education
Not Specified
Company size
Unknown
Industry
AI Hardware

Job Summary

Staff DDR & HBM Validation Engineer responsible for the bring-up, validation, characterization and debug of memory subsystems used in next-generation AI compute platforms. Focuses on DDR and HBM technologies, collaborating with silicon design, firmware, characterization, platform and systems teams to ensure functionality, performance, reliability and robust validation methodologies. Owns validation activities, contributes to debug and root-cause analysis, develops Python-based automation and reporting tools, and supports continuous improvement of validation infrastructure across silicon, firmware, board and system domains.

Required Qualifications

  • Strong experience validating DDR, LPDDR, HBM or related DRAM technologies
  • Deep understanding of DRAM architecture, memory subsystem operation and memory controller functionality
  • Experience with firmware, BIOS and Embedded C development
  • Strong programming skills in C and Python
  • Hands-on experience using laboratory equipment including oscilloscopes and related measurement instrumentation
  • Experience interfacing with low-speed peripherals including GPIO, SPI, I2C and UART/serial interfaces
  • Experience performing functional testing and signal measurements including voltage, frequency and timing analysis
  • Strong knowledge of embedded systems and microcontroller-based platforms
  • Hands-on experience with board bring-up and hardware validation activities
  • Experience debugging complex hardware, firmware and system-level issues
  • Experience performing silicon characterization and analysing validation results
  • Strong analytical, diagnostic and problem-solving skills
  • Excellent communication and collaboration skills with the ability to work effectively across multidisciplinary teams
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Graphcore

Staff DDR & HBM Validation Engineer

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