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Renesas ElectronicsPosted 1 month ago

Staff Board Package Design Engineer

On-siteHyderabad, Telangana, India

Full TimeSenior LevelEnterpriseSemiconductors

Job Summary

Lead the board and package design team from block-level specification through final delivery for high-performance SOCs and MCUs. Drive the product plan independently, defining requirements, developing designs, and executing releases while fostering a creative, productive environment. Manage system clocking, power management, and debug activities, including SOC and peripheral interface specifications for high-speed protocols like PCIe and LPDDR. Oversee schematic, layout, and BOM generation using modern CAD tools, ensuring compliance with DFM, DFA, and advanced packaging technologies such as SiP and flip-chip. Utilize SI/PI simulation tools and scripting to automate design activities, delivering sustainable, power-efficient solutions for automotive, industrial, and IoT markets.

Required Qualifications

  • MTech/BTech in EC/ EE/CS
  • hardware engineering experience of 7 to 10 years
  • Experience in Microcontroller and Microprocessor based complex design
  • Experience in latest packaging Technologies and Manufacturing process
  • Strong domain knowledge of system clocking
  • Strong domain knowledge of system modes
  • Strong domain knowledge of power management
  • Strong domain knowledge of debug
  • Highly experienced in board and package design from block level to final board and package delivery
  • Ability to work independently with little supervision
  • Must be a natural team player
  • Must be able to drive the team to define, develop and execute the product plan from specification to release

Desired Qualifications

  • Board level System architecture and design includes memory or communication interfaces
  • SOC specifications and board level system specifications
  • Development and design of SOC power supply, system power supply specifications, and PMIC specifications
  • Interface specifications incorporating SOC-peripheral devices
  • Experience with high-speed interface i.e. PCIe Gen3/4/5/, LPDDR 4/4x/5/5x, UFS, Ethernet, Flash memory
  • Board level DC/AC simulations
  • Schematic, Layout and BOM generation using modern CAD tools
  • Experience with SoC Bring-up activities
  • Familiarity with PCB technologies, DFM, DFA, materials, stackup design, assembly rules and manufacturing process
  • Experience with tools: Ansys HFSS or Cadence SI/PI, or other SI/PI, Cadence APD (Allegro Package Designer) for IC package layout design, SIwave, HSPICE, ADS, Q3D
  • Experience in IC packaging layout design, emphasizing advanced technologies like SiP (System-in-Package), flip-chip, and 3D packaging
  • Comprehensive knowledge of packaging design aspects, encompassing power distribution, thermal control, and signal fidelity
  • Thermal simulation experience
  • Profound understanding of semiconductor manufacturing methodologies and packaging assembly processes
  • Ability to automate the SI, PI and Packaging activities using scripting tools like Python, TCL

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