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Ayar LabsPosted 2 months ago

Sr. Staff Engineer, Package and Interconnect Reliability

$180,000–$223,000 year

On-siteSan Jose, California, United States

Full TimeSenior LevelMasters DegreeStartup

Job Summary

Lead reliability qualification and physics-of-failure analysis for next-generation silicon photonics packaging, owning the structural, thermal, and optical alignment integrity of complex 3D/2.5D packaging. Collaborate with foundries (notably TSMC) to qualify platforms like COUPE, CoWoS, and InFO variants; drive FAU integration, optical connector qualification, and non-destructive testing strategies; perform root-cause analyses using advanced techniques (CSAM, high-resolution X-ray, SEM/EDX, FIB) and coordinate with design and process teams to mitigate electromigration, thermo-mechanical fatigue, and delamination. Strong emphasis on cross-functional communication, failure analysis, and precision optical assembly in a fast-paced, technology-forward environment.

Required Qualifications

  • Education: BS in Materials Science, Microelectronics, Mechanical Engineering, Optical Engineering, Physics, or a related discipline
  • Experience: 6+ years of hands-on experience in semiconductor packaging reliability, with a strong focus on advanced 2.5D/3D heterogeneous packaging or optoelectronic components
  • Optical Assembly Expertise: Deep understanding of optical assembly methods, including passive/active alignment, FAU attach architectures, high-performance optical epoxies, and precision optical connectors
  • Foundry & Process Knowledge: Direct experience with advanced packaging foundries or OSATs; familiarity with wafer-level micro-bump assembly, die attach parameters, and technologies like TSMC COUPE
  • Reliability Knowledge: Knowledge of semiconductor and optoelectronic reliability statistics (Weibull, Lognormal) and industry standards (JEDEC, Telcordia GR-468, MIL-STD)

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