Sr. RFIC Layout Designer (RFIC Engineering)
On-sitePalo Alto, California, United States
Job Summary
Determine chip floor plans, power distribution strategies, and pad locations with packaging engineers. Perform layout of custom RF and analog circuit blocks, focusing on matching and minimizing parasitic capacitance. Execute design rule checking, electrical rule checking, and layout versus schematic validation to resolve errors. Integrate top-level layouts with electrostatic discharge structures and pad assemblies, then perform final tape out including density fill and design for manufacturability checks. Collaborate with EDA suppliers to trial new tools and generate guides to showcase improvements in layout techniques. Manage schedule estimates and identify areas of complexity requiring early investigation.
Required Qualifications
- Bachelor's degree in electrical or computer engineering
- 5+ years of professional experience as an IC layout designer
- 8+ years of professional experience with integrated circuit layout design
- Must be willing to work extended hours and weekends as needed to meet critical milestones
- Must be a U.S. citizen or national
- Must be a U.S. lawful, permanent resident (aka green card holder)
- Must be a Refugee under 8 U.S.C. § 1157
- Must be an Asylee under 8 U.S.C. § 1158
- Must be eligible to obtain the required authorizations from the U.S. Department of State
- Excellent communication skills (both oral and written)
- Able to work independently on challenging problems
Desired Qualifications
- Strong analog layout skills
- Experience in advanced node IC layouts such as 22nm, 16nm, 7nm, 5nm or below
- Experience in layout of circuits with frequencies up to 50GHz
- Experience in layout of sensitive RF blocks such as low noise amplifiers, voltage controlled oscillators and mixers
- Experience with skill programming
- Experience with shell scripting, Perl, Python or similar language
- Experience managing revision control systems
- Experience with circuit design
- Understanding of layout considerations for device matching, coupling and noise isolation
- Working knowledge of Linux
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