Sr. Principal SI/PI Engineer
$178,500–$331,500 year
On-site · San Jose, California, United States
Job Summary
Sr. Principal SI/PI Engineer responsible for hands-on SI/PI optimization and verification of test chip package designs and evaluation boards, providing extracted/ measured channel models to chip designers, and offering feedback to customers to ensure optimal IP performance in ASICs. Responsibilities include SI/PI design guidance, reviewing customer designs and simulation results, performing link performance simulations with S-parameter channel models and IBIS-AMI models, and debugging test chips or customer ASICs in the lab; requires proficiency with high speed SerDes architectures, PCB/FCBGA design knowledge, and lab instrumentation, along with strong communication and presentation skills.
Required Qualifications
- M.S. or Ph.D. in Electrical Engineering (or similar degree)
- 3+ years of experience preferably with high speed SerDes and PHYs
- Good understanding of high speed SerDes architecture
- Hands on lab experience with instruments like high speed oscilloscopes, TDRs, VNAs, spectrum analyzers
- Fluent with 3D and 2.5D extraction tools like Sigrity Clarity/PowerSI or Ansys HFSS/SIwave
- Experience with IBIS-AMI model simulations
- Experience with simulation result to lab measurement correlation
- Good understanding of PCB and FCBGA design rules and requirements
- Strong debugging and problem-solving skills
- Excellent communication and presentation skills to effectively communicate with both customers and internal stakeholders
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