Sr Principal Engineer AI/ML
$171,000–$325,000 year
On-site · Austin, Texas, United States or Santa Clara, California, United States
Job Summary
Lead RTL development and ownership of the latest AI-enabled RISC-V CPU core, defining micro-architecture and design for functional features, performance, power, and area. Design the RISC-V Vector CPU core and custom extensions, plus an AI-enabled Matrix engine to augment vector compute. Collaborate with CPU modeling teams on high-performance strategies; drive microarchitecture development from architectural exploration to detailed specifications; develop, assess, and refine RTL to meet timing, power, and area goals; provide functional verification support and assist verification strategies; work with a multidisciplinary team to validate physical design aspects and ensure reliability and security considerations. Demonstrate a strong track record in advanced CPU design, verification, and integration within SoCs, with emphasis on high-performance, low-power microarchitecture and vector/matrix-enabled architectures.
Required Qualifications
- Hands-on knowledge of the pipeline stages of an in-order or out-of-order high-performance CPU core
- Thorough knowledge of microprocessor architecture including expertise in one or more of: Instruction fetch and decode, branch prediction techniques; Instruction scheduling, register renaming, Reorder Buffer (ROB); Out-of-order execution; Integer and Floating-point execution; Load/Store execution; Instruction and Data Prefetch; Vector data path; Cache and memory subsystems; Cache coherency and memory consistency
- Knowledge of System Verilog, Verilog and/or VHDL
- Experience with simulators and waveform debugging tools
- Master’s degree with 10+ years of experience, PhD 5+ years of work experience
- Preferred: Experience with designing RISC-V, ARM, and/or MIPS CPU; hardware multi-threading, virtualization, and SIMD designs; vector and matrix-enabled CPUs; understanding of high-performance techniques and trade-offs in CPU microarchitecture; low-power microarchitecture techniques; scripting with Perl or Python; CPU integration at SoC level; safety and security microarchitecture
Apply with one swipe on Sorce. We auto-fill applications and apply on your behalf — no cover letters, no 40-minute forms.
Hiring someone like this?
Get your role in front of qualified candidates on Sorce.