Sr. Engineer, Silicon Validation
$160,000–$192,000 year
On-site · San Jose, California, United States
Job Summary
Own the silicon bringup and validation of Ayar Labs' optical chiplets, including post-silicon bringup and characterization across SerDes, photonic, and mixed-signal blocks; build and maintain test infrastructure and Python-based automation for regression/characterization; investigate silicon anomalies and drive fixes with cross-functional teams; write test plans, validation reports, and signoff documentation; collaborate with firmware, analog/mixed-signal, digital, and systems engineers across the full product development cycle; perform initial power-on bringup, clock/power-domain verification, and functional tests; use lab equipment (BERT, oscilloscope/DCA, OSA, signal generators) to characterize signal integrity, eye diagrams, BER, jitter, and optical performance; develop and maintain Python-based test scripts; strong troubleshooting and independent work in a lab environment; familiarity with Git and software development environments; preferred: MS EE, photonics experience, high-speed serial standards, JTAG/I2C/SPI for board-level debug.
Required Qualifications
- Bachelor's degree in Electrical Engineering or related field with 3+ years of relevant industry experience
- Hands-on experience with post-silicon bringup and validation of high-speed SoC or mixed-signal devices
- Working knowledge of SerDes PHY operation and characterization, including NRZ and/or PAM-4 signaling
- Proficiency with lab equipment used for high-speed characterization: BERT, oscilloscopes, signal analyzers
- Proficiency in Python for test scripting and data analysis
- Strong troubleshooting skills and ability to work independently in a lab environment
- Proficiency with version control (Git) and software development environments
Additional Requirements
- Principals only. We are not accepting resumes from recruiters for this position.
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