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Ayar Labs1 day ago

Sr. Engineer, ASIC Design Verification

On-site · Bengaluru, Karnataka, India

Type
Full Time
Level
Senior Level
Education
Masters Degree
Company size
Startup

Job Summary

Sr. Engineer - ASIC Design Verification responsible for pre-Si verification and validation of complex SoCs with both high-speed custom and digital blocks. Develop verification methodology and testbenches for digital and mixed-signal blocks. Create test plans, coverage analysis and closure for parallel link and SerDes IP blocks and on-chip interconnects. Design and contribute to design-for-test (DFT) methodologies. Requires hands-on, self-starting contributor who can craft design specifications, verification suites, and test-benches from input by colleagues and customers, manage time effectively, and work with limited supervision. Preferred experience includes verification of SerDes IP, PCS/PMA layers, HBM interfaces, post-place-and-route functional verification, multiple clock domains, formal model checking, and Python programming.

Required Qualifications

  • BS or MS in Electrical Engineering, Computer Engineering or equivalent
  • 2+ years of ASIC verification experience
  • 2+ years of SystemVerilog, UVM testbench development for design verification of complex digital and PHY blocks (in AMS and WREAL modeling verification)
  • 2+ years of scripting and/or programming skills
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Ayar Labs

Sr. Engineer, ASIC Design Verification

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