Sr. Engineer, ASIC Design
On-site · Bengaluru, Karnataka, India
Job Summary
Sr. Engineer, ASIC Design responsible for design and integration of complex SoCs with both high-speed custom and digital blocks. Develop and optimize RTL designs, verification methodology and testbenches for digital and mixed-signal blocks, and perform bringup, evaluation, and debug of in-house custom silicon using Python scripting, firmware, and control systems. Create clear documentation to enable backend ASIC engineers to perform physical implementation and collaborate to ensure timing signoff. Requires BS or MS in Electrical/Computer Engineering, 1+ years ASIC experience, proficiency in Verilog and ASIC verification tools (XCelium, VCS, Questa), and scripting/programming languages. Preferred: timing constraints, multi-clock-domain designs, LEF/lib integration, silicon bring-up, Python/C/C++ programming, and some optics/control systems knowledge.
Required Qualifications
- BS or MS in Electrical Engineering, Computer Engineering, or related fields
- 1+ years of work or academic experience in ASIC design
- History of assuming responsibility for a variety of technical tasks and completing projects independently
- Proficient in Verilog for both RTL design and verification
- Proficient in ASIC verification (XCelium, VCS, Questa) tools
- Proficient in scripting or programming languages
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