Sr BEOL Engineer - DRAM Process Integration
On-siteBoise, Idaho, United States
Job Summary
Develop advanced DRAM BEOL process flows by optimizing metallization, dielectrics, and interconnect technologies while troubleshooting integration issues across multiple process modules. Collect and analyze process and electrical data to drive yield improvement and reliability enhancement, utilizing statistical tools like JMP, Python, and R, as well as Agentic AI modeling. Collaborate with cross-functional teams to resolve technical challenges, document findings, and support technology transfer from R&D to pilot production. Participate in pathfinding efforts for next-generation architectures and apply Design of Experiments methodologies to validate new materials and deposition techniques.
Required Qualifications
- MS/PhD (preferred)/BS (required) in Electrical Engineering, Materials Science, Chemical Engineering, Microelectronics, Physics, Chemistry, or related field
- coursework or research in thin films, interconnect technology, or nanofabrication
- Foundational understanding of semiconductor fabrication processes (thin film deposition, etch, lithography, CMP)
- Familiarity with BEOL concepts: metallization, interconnects, dielectrics, barrier/liner films
- Hands-on experience with deposition techniques (CVD, ALD, PVD) or etch processes
- Exposure to DRAM or memory device technology paired with experience with process integration, yield improvement, or reliability testing
Desired Qualifications
- Internship or co-op experience in a semiconductor fab or R&D environment
- Willingness to learn, adapt, and work in a fast-paced R&D environment paired with proficiency in statistical analysis tools: AI tool such as Claude Code...etc
- Familiarity with characterization techniques: SEM, TEM, XRD, electrical testing
- Experience with DOE (Design of Experiments) methodology
- Knowledge of semiconductor reliability concepts (electromigration, TDDB, stress migration)
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