Sr. ASIC Design Verification Engineer (Starshield)
$160,000–$225,000 year
On-site · Hawthorne, California, United States
Job Summary
Senior ASIC Design Verification Engineer for SpaceX Starshield, focusing on digital ASIC verification at block and system levels, leading verification test plans, developing SystemVerilog testbenches (UVM/Non-UVM), automating test generation with Python and MATLAB, and contributing to pre/post-silicon validation and chip bring-up. Requires 5+ years in design verification, a Bachelor's degree in EE/CE/CS, and experience with UVM/OVM/VMM, Python scripting, and RTL design. Travel for off-site testing and potential ITAR considerations apply; active clearance may influence program access. Location: Hawthorne, CA, US (on-site). Salary range: $160,000 - $225,000 per year with potential additional differential for active clearance.
Required Qualifications
- Bachelor’s degree in electrical engineering, computer engineering, or computer science
- 5+ years of experience with design verification and test bench development
- Advanced degree in electrical engineering or computer engineering (preferred)
- Experience with verification methodologies such as UVM/OVM/VMM
- Strong object-oriented programming knowledge
- Strong problem-solving and coding skills
- Experience in constrained random verification
- Experience with scripting languages, e.g. Python for automation
- RTL design, chip bring-up, and post-silicon validation experience
- Willingness to travel for off-site testing
- Active clearance may provide opportunity for work on sensitive SpaceX missions; subject to pre-employment drug testing
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