SoC Verification Engineer
$141,910–$200,340 year
HybridAustin, Texas, United States or Santa Clara, California, United States
Job Summary
Create and update UVM-based test bench generation and test case creation to define scalable verification plans for block, subsystem, and SoC designs. Execute verification plans using emulation and system simulation models to uncover bugs and ensure design functionality aligns with microarchitecture specifications. Debug and root cause issues in presilicon environments, implementing corrective measures while collaborating with architects, RTL developers, and physical design teams. Integrate security coverage activities within test plans and maintain existing functional verification infrastructure. Document test plans and drive technical reviews with design and architecture teams. Shift 1 in the US, Texas, Austin. Salary $141,910-200,340 USD. Bachelor's degree in EE/CS with 4+ years in SoC design verification. Hybrid work model available. Join Intel's product development group to shape the future of computing.
Required Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
- 4+ years of hands-on experience in SoC design verification
- demonstrated expertise in OVM/UVM methodologies
- debugging
- test planning
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
- 3+ years of hands-on experience in SoC design verification
- demonstrated expertise in OVM/UVM methodologies
- debugging
- test planning
- AMBA protocols such as CHI, AXI, AHB, and APB
- industry-standard VIP from various EDA vendors
Desired Qualifications
- Experience with postsilicon validation and incorporating feedback into presilicon test plans
- Familiarity with emulation models and system simulation tools for performance analysis
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