SoC DFX Staff Engineer
HybridOttawa, Ontario, Canada
Job Summary
Collaborate with architects, hardware engineers, and firmware teams to define, design, and verify robust Design for Test (DFT) and Design for Debug (DFD) solutions for complex, high-performance SoCs. Integrate DFX features that enable efficient silicon validation, bring-up, and debug across the full product lifecycle. Build directed and random verification tests, estimate time for feature implementation, and debug test failures to determine root causes with RTL and firmware engineers. Review functional and code coverage metrics, modifying tests or constraining random tests to meet requirements. Work with Tessent tools suites, JTAG, LBIST, and ATPG to resolve design defects and correct test issues while automating workflows in distributed compute environments.
Required Qualifications
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
- Experience with DFT (Design for Test) and DFD (Design for Debug) architecture, design, and verification
- Experience with JTAG, LBIST, MBIST, Scan, and ATPG
- Familiarity with the Tessent tools suite, including Scan and ATPG
- Experience with post-silicon bring-up
- Experience with IP-level and ASIC verification
- Experience debugging firmware and RTL code using simulation tools
- Experience with Verilog, SystemVerilog, SystemC, and C++
- Experience with UVM concepts and the SystemVerilog language
- Experience with static timing analysis and constraints
- Familiarity with ICL/PDL
- Scripting language experience: Perl, Ruby, Makefile, and shell
Desired Qualifications
- Experience automating workflows in a distributed compute environment
- Exposure to leadership or mentorship is an asset
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