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NVIDIAPosted 2 weeks ago

Silicon Performance, Power and Binning Tools Engineer

On-siteShanghai, Shanghai, China

Full TimeSenior LevelMasters DegreeEnterprise

Job Summary

Build the infrastructure that turns raw simulation data into real firmware tuning, product specs, and manufacturing limits. Own the pipelines between tools and use LLMs and agents to automate analysis, validation, and reporting work. Construct observability and validation systems that catch data errors before they become release blockers. Collaborate with product convergence, silicon architecture, firmware, and manufacturing teams to translate hardware requirements into production workflows. This role requires a BS/MS in CS, CE, EE, or Systems Engineering with 4+ years in hardware/software, strong digital design fundamentals, and hands-on experience applying LLMs to engineering problems. Support questions do not always wait for business hours.

Required Qualifications

  • BS/MS in CS, CE, EE, or Systems Engineering, or equivalent experience
  • 4+ years of experience in a related hardware/software position
  • Strong understanding of digital design, circuit analysis, algorithms, computer architecture, silicon speed and power, BIOS, drivers, and software applications
  • Experience with Perl/Python, databases, and web applications
  • Strong fundamentals in software algorithms and object-oriented programming
  • Demonstrate ability to divide complex problems into simple sub-problems and reuse available solutions to solve a broad range of challenges efficiently
  • Hands-on experience applying LLMs to engineering problems: agents, MCP, RAG, or evaluation pipelines
  • Have shipped an LLM-backed feature in production and can tell us about a time you had to debug one
  • Strong instincts for data quality: the automated checks, schema validation, and integration tests that keep pipelines trustworthy when inputs change
  • You keep up with a fast-paced AI landscape and can distinguish which new tools matter and which are just hype

Desired Qualifications

  • Silicon product proficiency (speed, power, voltage noise, binning)
  • MCP, DSPy, or LLM evaluation frameworks
  • Perl interop for legacy chip-data workflows
  • have crafted dashboards and visualizations for diverse collaborators

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