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Intel3 weeks ago

Silicon Packaging Design Engineer

$105,650–$200,340 year

On-site · Phoenix, Arizona, United States or Hillsboro, Oregon, United States

Type
Full Time
Level
Mid Level
Education
Bachelors Degree
Company size
Enterprise
Industry
TECH

Job Summary

Design and implement physical layout and routing of silicon interposers and embedded bridges. Perform substrate fit and routing studies to evaluate design tradeoffs in performance, cost, and manufacturability. Collaborate closely with silicon, technology development and hardware teams to optimize system-level design, including silicon-package-board integration and pinout. Propose design updates changes for rules and conduct internal and external reviews to ensure design feasibility. Analyze design data and resolve design rule checks (DRCs) to achieve optimized and manufacturable package designs. Utilize industry-leading electronic design automation (EDA) tools, including Virtuoso, Innovus, FusionCompiler, ICvalidator, and Calibre, to create robust package layouts. Document processes and design specifications in the product lifecycle management system to ensure traceability and efficient collaboration. Conduct reviews with partner teams to close milestone requirements.

Required Qualifications

  • Bachelor's degree with 3+ years of experience OR Master's degree with 2+ years of experience in Electrical Engineering, Computer Engineering, or a STEM related field
  • Proficiency in custom layout and Auto-place-and-route EDA tools including Virtuoso, Innovus, FusionCompiler, ICvalidator, and/or Calibre
  • Experience with silicon physical layout design and development, routing interconnects, and/or review tools
  • At least one of the following: 1+ year of Analog/Mixed Signal fundamentals for signal integrity assessments and I/O fundamentals; 1+ year of power distribution and power integrity assessments; 1+ year of reliability requirements for interconnects
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$106k – $200k / yr

Silicon Packaging Design Engineer · Intel

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