SI/PI Intern

Intern in Signal Integrity / Power Integrity to help design and validate the next generation of high-performance AI systems. Work closely with package, PCB, ASIC, and system engineers to analyze high-speed interfaces, extract channel models, and improve signal quality across accelerator platforms. Hands-on experience with PCIe, Ethernet, high-speed SerDes channels, advanced packaging, and multi-board systems. Build and validate 3D electromagnetic models using Ansys HFSS; develop board and package channel models; correlate simulations with measurements; and contribute to SI design guidelines. 12-week paid internship based at the West San Jose office with housing support for relocation, mentorship from industry leaders, and opportunities to work on critical problems.