Senior Verification Engineer
On-site · Barcelona, Catalonia, Spain
Job Summary
Senior Verification Engineer responsible for ensuring correctness and functionality of complex digital designs at RTL level using SystemVerilog and UVM, with experience in block/sub-system/top-level verification, formal and dynamic verification, scripting (Python, Perl, Bash, TCL), regression tools, and version control (git, svn); strong problem-solving, communication, and teamwork skills, and experience with simulation tools in a RISC-V CPU cores environment. Location: Barcelona, Spain; in-person role. Education: Master or PhD; English proficiency (C1) and Industrial experience >8 years.
Required Qualifications
- Master or PhD
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