Senior Verification Engineer - Hardware
$168,000–$310,500 year
On-site · Santa Clara, California, United States
Job Summary
Senior Verification Engineer for the Emulation division, onsite in Santa Clara, CA. You will bring up SOCs on emulation, root-cause SoC/Processor test failures and emulator environment issues, and collaborate with Design, DV, Power, Silicon Validation, Performance, and Software teams. Lead emulation vendors to debug issues using tools and contribute to advanced verification environments (Verilog/VHDL, SystemVerilog, UVM, DPI Transactors, coverage, and power estimation). Requires MS or equivalent and 3+ years of experience; proficiency in Verilog/VHDL, C/C++, SystemVerilog; experience with UVM and scripting in Perl, Python, or C/C++. Familiarity with hierarchical/top-down design and system-level verification is expected. The role offers competitive compensation, equity, and benefits, with on-site employment at NVIDIA Santa Clara.
Required Qualifications
- M.S or equivalent experience in Electrical Engineering, Computer Science, Computer Engineering or related field
- 3+ years of proven experience
- Proficiency in Verilog and/or VHDL, C/C++ and SystemVerilog
- Experience with UVM verification environments and scripting with Perl, Python and C/C++
- Familiar with hierarchical design approach, top-down design, SoC and system level verification
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