Senior Staff Engineer, Physical Design
On-siteBengaluru, Karnataka, India
Job Summary
Lead block- and subsystem-level physical design closure, including timing closure, congestion mitigation, power integrity, and overall physical implementation quality. Collaborate closely with SoC-level physical design teams to align on clocking strategies, floorplanning intent, and integration requirements. Develop, refine, and scale subsystem closure methodologies, flows, and automation to improve predictability and execution efficiency. Mentor engineers within subsystem teams while working cross-functionally with RTL, STA, power, and verification groups to ensure robust handoffs. Proactively identify and mitigate physical design risks by coordinating with SoC teams to manage impacts. Requires 10+ years of experience in physical design with expertise in clocking methodologies, timing, and power integrity.
Required Qualifications
- 10+ years of experience in physical design, with a strong focus on subsystem-level closure for complex hierarchical SoCs
- Strong expertise in timing closure and constraint management
- Strong expertise in congestion analysis and resolution
- Strong expertise in power integrity and power-aware physical implementation
- Strong expertise in block and subsystem-level physical design flows
- Solid understanding of SoC-level floorplanning and clocking methodologies
- Hands-on experience with industry-standard tools such as Synopsys ICC2, Fusion Compiler, PrimeTime
- Hands-on experience with industry-standard tools such as Cadence Innovus, Tempus, Certus
- Proficiency in scripting and automation using Tcl, Python, and/or Perl
- Deep knowledge of end-to-end SoC design flows
- Strong understanding of low-power design techniques and power-aware implementation methodologies
- B.Tech or M.Tech in Electronics and Communication, Electrical Engineering, Computer Science, or a related field
Desired Qualifications
- Strong cross-functional collaboration skills
- Experience collaborating effectively at the SoC level, not leading these activities
- Experience coordinating closely with SoC teams to manage impacts and drive solutions
- Experience working cross-functionally with RTL design, STA, power, verification, and backend teams
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