Senior Research Engineer - Ethernet PHY & High-Speed Interconnect Research (m/f/d)

Senior Research Engineer role focused on Ethernet PHY and high-speed interconnect research. Develop advanced behavioral and nonlinear models of PHY components to capture real-world impairments and improve system-level predictions. Explore and evaluate novel signal processing and compensation techniques, identify dominant impairments and quantify their impact under realistic operating conditions. Propose and evaluate architectural and block-level concepts to address limitations and bottlenecks, collaborating with multidisciplinary teams to align network innovations with hardware development. Contribute to system architecture discussions and industry standards through data-driven analysis, engage with the global research community via publications and conferences, and participate in IEEE and IEEE Ethernet standards activities. Strong emphasis on research-driven, long-term challenges and collaboration with universities and international partners; require advanced degrees, expertise in signal processing, high-speed Ethernet, and proficiency in Python/MATLAB, with English language fluency.