Senior Principal Digital Design Engineer
On-site · Bengaluru, Karnataka, India
Job Summary
Senior Principal Digital Design Engineer responsible for ownership of a digital sub-system within an SoC, including RTL coding, timing closure, power/area optimization, and DFT/debug support. Lead and mentor a design team, evaluate and select IP, support back-end timing closure, provide timing constraints, and assist in silicon evaluation and verification. Requires AMBA protocol expertise, ARM-based SoC knowledge, functional simulation and synthesis tooling experience, and strong collaboration with SW teams; responsibilities include documentation, problem analysis, and planning inputs.
Required Qualifications
- 12+ years of experience in digital design and SoC integration
- Expert in AMBA protocols
- Knowledge of ARM based SoC architecture
- Familiar with CPF/UPF formats
- Good knowledge of digital timing concepts and DFT concepts
- Experience with functional simulation tools, synthesis tools, Spyglass
- Strong communication skills in English
- Team player eager to develop best-in-class products
- mentored/led team members
- Support for backend timing closure and timing constraints
- RTL coding and netlist verification
- Power analysis, clock architecture, and timing closure
- DFT and design for testability
- Synthesis and verification tooling
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