Senior Package Layout Engineer - Hardware
$136,000–$212,750 year
RemoteCalifornia, United States or Santa Clara, California, United States
Job Summary
Collaborate with design teams to implement high-speed/density ASIC packages and perform substrate breakout patterns. Optimize package pinout incorporating system-level trade-offs and assist in routing, placement, stack-up, and power distribution using Cadence APD or SiP tools. Propose layout design trade-offs to the Technical Package Lead and conduct feasibility studies to evaluate package goals for size, cost, and performance. Develop symbols and CAD library databases while establishing methodologies to improve layout productivity. This role supports the development of sophisticated IC substrates for NVIDIA products, leveraging expertise in high-speed design signal integrity and Cadence APD/SiP tool suites.
Required Qualifications
- B.S. Electrical Engineering or equivalent experience
- 5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology
- Proven experience in substrate layout of wire bond and flip chip packages
Desired Qualifications
- Experience with HDI designs
- Significant background with Cadence APD or SiP and/or PCB layout tools (including Constraint Manager)
- Solid understanding of high-speed design signal integrity practices
- Experience with Virtuoso and Calibre
- Experience using Valor
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