Senior HV-BCD Device Expert_
On-site · Hsinchu, Taiwan, Taiwan
Job Summary
Lead the development and optimization of HV and BCD device architectures (LDMOS, EDMOS, ESD) across 180nm to 55nm nodes. Drive device physics analysis (BV, Rdson, SOA, reliability such as HCI/NBTI) and leverage TCAD for 2D/3D process/device simulations to accelerate development. Define verification plans and perform statistical analysis in JMP for DOE and WAT data; integrate designs within Cadence environments for layout review and test structures. Collaborate cross-functionally with PI and PE teams to resolve yield, reliability, and manufacturing bottlenecks. Preferred: experience with GaN/SiC/IGBT and silicon photonics knowledge; strong ownership, critical thinking, communication, and data-driven decision-making. More information about NXP in Greater China... (#LI-7743).
Required Qualifications
- Experience: Master’s or Ph.D. in EE, Physics, or related field with 10+ years of semiconductor industry experience.
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