Senior FPGA Verification Engineer
On-site · Columbia, Maryland, United States
Job Summary
Senior FPGA Verification Engineer role focused on verifying embedded FPGA firmware for radio communication systems. Responsibilities include developing test specifications/plans, creating self-checking test benches in SystemVerilog within a UVM framework, verifying FPGA designs to meet requirements, and presenting technical briefings. Requires extensive experience in FPGA/ASIC verification, SystemVerilog, UVM/OVM, familiarity with Ethernet interfaces, cryptographic algorithms, Mentor Graphics tools, and a security clearance. Relocation assistance provided; position based in Columbia, MD.
Required Qualifications
- Bachelor’s Degree or higher
- minimum 6 years of relevant FPGA/ASIC verification experience OR equivalent
- Security clearance eligibility (U.S. citizens)
- Experience with SystemVerilog and UVM
- Mentor Graphics Verification tools
- Experience with Ethernet and cryptographic algorithms
- Familiarity with Linux and scripting languages
Desired Qualifications
- Mentor Graphics Verification tools
- SystemVerilog
- UVM/OVM
- C++
- Java
- Python
- Linux
- Ethernet
- cryptographic algorithms for embedded systems
- FPGA/ASIC RTL Design
- accuracy in test plans and verification strategies
- highly motivated team player
- security clearance
- US citizenship
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