Senior FPGA Modem Engineer
$190,000–$280,000 year
On-siteMountain View Santa Clara County, California, United States or San Diego, California, United States
Job Summary
Own FPGA-based modem chains through all development phases, from micro-architecture to lab deployment. Define micro-architecture for high-rate modem blocks and surrounding digital infrastructure, implementing designs in SystemVerilog or Verilog. Develop verification environments using golden reference models and create synthesis and place-and-route build scripts to meet timing, power, and resource requirements. Establish clean hardware/software interfaces for registers, telemetry, and fault signaling while conducting code reviews and collaborating with systems, HW, and FW teams for board bring-up. Mentor junior engineers and lead technical discussions on FPGA best practices.
Required Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field
- A minimum of 10+ years experience in design, development and implementation of wireless baseband modems using FPGA devices
- Equivalent experience in ASIC modem design
- Proficiency in one or more HDL programming languages such as VHDL, Verilog, or SystemVerilog
- Experience writing verification frameworks using SystemVerilog/UVM, Cocotb or transactional-level modeling
- Thorough knowledge of modern FPGA architecture including experience with advanced floorplanning clock-domain crossing (CDC) analysis, false-path isolation, and timing closure techniques
- Experience using these techniques with AMD UltraScale+ and Versal FPGA families
- Deep understanding of Digital Front End (DFE) architectures, including digital up/down conversion (DUC/DDC), interpolation/decimation filters, and interfacing with high-speed ADCs and DACs
- Experience with industry-standard bus interfaces such as AXI and AXI-streaming and high-speed interfaces such as DDR4/5, 10/40/100 Gb Ethernet and SERDES interfaces like JESD-204B/C, Aurora and Interlaken
- Experience with FPGA toolchains and workflows such as AMD Vivado, including simulation, synthesis, place-and-route, timing analysis and closure as well as power analysis
- Experience debugging FPGA or digital hardware in the lab using oscilloscopes, logic analyzers, spectrum analyzers, time-interval measurement tools, or similar instrumentation
- Experience working with embedded software design, especially in complex debugging of FPGA on-target SW/HW interaction
- Familiarity with Linux-based development environments, Git, and automated testing
- Strong written and verbal communication and interpersonal skills
- Ability to prioritize work, complete multiple tasks and work under deadlines with minimal supervision
Desired Qualifications
- Experience implementing both the MAC and PHY layers of a wireless modem such as 5G OFDMA or Single-Carrier DVB-S2(X) through the entire product life cycle for an FPGA or ASIC target
- Experience with space, defense, or other reliability-critical electronics, including radiation-tolerant design, Triple Modular Redundancy (TMR), and single-event upset (SEU) mitigation techniques
- Experience with embedded firmware or low-level software for device control, board bring-up, telemetry, and calibration workflows
- Experience with board-level digital or mixed-signal hardware design, schematic review, clock-tree or oscillator circuitry and hardware bring-up
- Experience writing tests and automation scripts using C, C++ or Python
- Experience designing HW accelerators tightly coupled with the embedded processor subsystems present in most modern FPGA devices
- Experience with the architecture, toolchains and programming of SIMD vector DSP engines for wireless modem applications
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