Senior Engineer, Digital Design Engineering
$123,600–$175,440 year
Hybrid · Dallas, Texas, United States
Job Summary
Senior Engineer, Digital Design Engineering responsible for developing state-of-the-art analog/mixed-signal and digital IC solutions. Work includes RTL design using Verilog/SystemVerilog, verification planning, simulation, debugging, and gate-level verification; collaborating with analog, firmware, applications, and product engineering teams; building and running block/top-level test benches; creating design documentation and user guides; and contributing across the product development lifecycle from definition to tapeout. Partial telecommute available (2 days/week from home) alongside on-site activities in Dallas, Texas.
Required Qualifications
- Master’s degree in Electrical Engineering, Electronic Engineering, Computer Science, Computer Engineering, or closely related technical field (foreign education equivalent accepted)
- Two (2) years of experience as a Digital Design Engineer or related occupation performing digital or mixed signal design and verification
- Experience with digital design methodologies (RTL design, Lint, CDC)
- Experience with simulations, synthesis, and CDC using Cadence or Synopsis tools
- Experience with verification tools and techniques (Verilog, SystemVerilog, ASIC design flow)
- Participation in all phases of digital design development and tapeout activities
- Experience with verification plan generation, coverage analysis, transaction-level modeling, pseudo and constrained random techniques, assertion-based and formal verification techniques with SystemVerilog
- Experience with new digital design using Verilog RTL, Standard cells, and similar approaches for mixed-signal ASIC and FPGA designs
- Strong documentation skills and ability to create user guides and operating procedures
- Proven ability to work in cross-functional teams and present results
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