Senior Director, Physical Design & Backend Engineering (HPC)
$260,000–$290,000 year
On-siteAustin, Texas, United States
Job Summary
Lead end-to-end backend execution for complex HPC SoC and MCU programs, managing synthesis, floorplanning, place & route, timing closure, physical verification, and tape-out across multiple concurrent silicon initiatives. Own Power, Performance, and Area (PPA) targets while driving first-pass silicon success and delivery against aggressive schedules. Scale and mentor a globally distributed engineering organization, establishing standards, KPIs, and execution metrics to improve predictability and productivity. Collaborate cross-functionally with architecture, RTL, and product teams to ensure manufacturable silicon outcomes. This senior leadership role supports next-generation semiconductor technologies including automotive and advanced-node SoCs.
Required Qualifications
- Master's degree in Electrical Engineering, Computer Engineering, or a related technical discipline preferred
- Bachelor's degree with extensive semiconductor industry experience will also be considered
- 20+ years of semiconductor industry experience with deep expertise in physical design and backend engineering
- Significant leadership experience at the Director or Senior Director level leading physical design and backend engineering organizations
- Proven ownership of complete RTL-to-GDSII delivery across multiple concurrent SoC programs
- Demonstrated success leading large, globally distributed engineering organizations
- Experience delivering multiple advanced-node tape-outs (5nm, 7nm, 3nm or similar)
- Proven track record delivering complex SoC programs while meeting aggressive schedule, quality, and PPA objectives
- Experience working across multiple global engineering sites and cultures
- Deep expertise in RTL-to-GDSII implementation
- Deep expertise in Logic synthesis
- Deep expertise in Floorplanning
- Deep expertise in Place & Route (PnR)
- Deep expertise in Clock Tree Synthesis (CTS)
- Deep expertise in Timing closure
- Deep expertise in Physical verification
- Deep expertise in Design signoff
- Deep expertise in Tape-out execution
- Deep expertise in Advanced-node implementation methodologies
- Deep expertise in SoC and MCU integration
- Deep expertise in Power, Performance & Area (PPA) optimization
- Deep expertise in Backend methodology development
- Deep expertise in Physical implementation automation
- Executive leadership of large, globally distributed engineering organizations
- Strong execution focus with accountability for delivery outcomes
- Excellent cross-functional collaboration across architecture, RTL, methodology, product engineering, and executive leadership
- Data-driven decision-making using engineering metrics and KPIs
- Ability to build, mentor, and retain world-class engineering teams
- Proven success driving organizational change and engineering excellence at scale
- Must be authorized to work in the United States without current or future sponsorship
- This is an on-site position based in Austin, TX
- Candidates willing to relocate are welcome to apply
Desired Qualifications
- Master's degree in Electrical Engineering, Computer Engineering, or a related technical discipline preferred
- Bachelor's degree with extensive semiconductor industry experience will also be considered
- Experience in one or more of the following domains: High-Performance Computing (HPC), Automotive semiconductor platforms, Advanced SoCs, AI accelerators, Networking silicon, Mobile processors
- Additional experience with Organization-wide methodology development
- Additional experience with Backend flow optimization
- Additional experience with Engineering process standardization
- Additional experience with Multi-site engineering leadership
- Additional experience with Advanced-node silicon implementation
- Experience collaborating with leading semiconductor foundries and EDA vendors is highly desirable
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