Senior Circuit Design Engineer - AI & HPC (7708)
$120,000–$165,000 year
Hybrid · San Jose, California, United States
Job Summary
Senior Circuit Design Engineer focusing on AI & HPC memory technologies in a San Jose office with a hybrid schedule (4 in-office days). Responsibilities include designing custom memory circuits for AI/HPC, optimizing PPA for SRAM, conducting Time/Power/Area analyses, providing layout guidance, and collaborating with RTL and PD teams; required expertise in VLSI design, Verilog, SPICE, DFT, and EDA tools; preferred experience with sub-5nm nodes and IP products; strong scripting abilities and leadership in customer IP contexts.
Required Qualifications
- Master’s degree with 3+ years of relevant industry experience, or a Ph.D. demonstrating applicable academic research in VLSI design or custom circuits
- In-depth knowledge of VLSI design, digital integrated circuits, Verilog, logic design, and DFT
- Hands-on experience running SPICE simulations for custom circuits
- A collaborative mindset with a strong teamwork attitude and excellent communication skills
- Advanced knowledge of leading-edge process nodes (TSMC N7 and below), ideally with a track record of successfully delivering product tapeouts below 5nm
- Familiarity with scripting and automation (Perl, TCL, Python) is highly advantageous
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