Senior ASIC Verification Engineer (AI Hardware)
RemoteUnited States
Job Summary
Define and drive verification strategies for advanced ASIC designs used in AI/compute workloads, including building detailed verification plans with coverage goals and validation approaches. Develop scalable verification environments using System Verilog and UVM, creating simulation infrastructure with directed and constrained-random test scenarios. Work cross-functionally with design and architecture teams to achieve coverage closure, while identifying and resolving design issues throughout pre-silicon and early silicon validation phases. Partner with FPGA and emulation teams to support early prototyping and manage project milestones to address risks.
Required Qualifications
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline
- 8+ years of hands-on experience in ASIC or SoC verification
- Strong proficiency with System Verilog and UVM-based verification flows
- Deep understanding of verification planning, coverage methodologies, and testbench architecture
- Experience working with leading EDA toolchains (e.g., Cadence, Synopsys, Siemens EDA)
- Solid debugging skills, including waveform analysis and scripting (Python, Tcl, or similar)
- Exposure to high-performance compute architectures such as AI accelerators, memory hierarchies, or high-speed interfaces
- Demonstrated success verifying complex silicon designs
Desired Qualifications
- Advanced degree in a relevant engineering field
- Experience with hardware/software integration or co-verification
- Familiarity with formal verification methods
- Exposure to post-silicon validation, bring-up, or lab debug processes
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