RTL Design Engineer - Remote
RemoteUnited States
Job Summary
Own micro-architecture definition derived from high-level functional specifications and develop RTL for complex digital blocks using SystemVerilog. Drive digital block control logic and IP integration while participating in subsystem-level architecture alignment discussions. Support design sign-off activities including CDC, RDC, lint, and synthesis readiness checks, and collaborate closely with Design Verification teams for closure and debug. Take full project lifecycle ownership with minimal supervision for custom silicon development. This fully remote 12-month contract engagement requires hands-on fluency in memory controller design and SoC integration, with the ideal candidate operating independently from day one.
Required Qualifications
- Strong, current expertise in RTL design using SystemVerilog and/or Verilog
- Demonstrated ability to independently define micro-architecture from functional specs
- Recent hands-on experience designing custom RTL blocks such as controllers, DMAs, or SoC bus bridges
- Solid understanding of memory controllers, including HBM, DDR4, or DDR5
- Experience with SoC integration and digital subsystem design
- Proficiency with IP integration and block-level ownership
- Working knowledge of sign-off flows including CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing)
- Experience designing IPs with multiple clock domains
- Ability to operate independently with no ramp-up time required
- Fully remote work arrangement
- 12-month contract engagement
Desired Qualifications
- Experience in subsystem-level RTL development
- Exposure to Die-to-Die (D2D) logic design
- Prior experience working directly with major hyperscaler silicon teams
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