Quantum Bump Integration Engineer
$98,000–$176,000 year
On-site · Essex Junction, Vermont, United States
Job Summary
Lead development and integration of cryogenic, superconducting bump interconnect technologies for scalable quantum hardware packaging. Own end-to-end bump integration flows from wafer-level processing through assembly and qualification, and drive integration schemes across 2.5D/3D architectures (interposers, TSVs, die-to-wafer flows). Collaborate with device/qubit engineers, cryogenic system teams, packaging & assembly teams, and reliability/modeling groups to optimize bump structures, metallurgy, and process flows; enable rapid prototyping and transition to pilot/high-volume manufacturing. Seek to improve yield, reduce defectivity, and ensure robust performance at cryogenic temperatures; apply DOE and statistical methods for root-cause analysis. Mentor team members and contribute to IP and technical publications; participate in hiring and cross-functional initiatives. Must be able to travel up to 10% and work in Essex Junction, VT.
Required Qualifications
- Education – Master’s in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Materials Science or related field from an accredited degree program
- MS degree with at least 8 years of prior related work experience
- In depth knowledge of BEOL processes and integration, bump/wafer finish integration, wafer test/probe, OSAT collaboration, and package development & assembly
- Strong problem solving and technical trouble shooting skills including expertise in design of experiment
- Must have at least an overall 3.0 GPA and proven good academic standing
- Language Fluency - English (Written & Verbal)
- Travel - Up to 10%
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