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Marvell Semiconductor1 week ago

Principal SerDes Validation Engineer

$150,680–$225,700 year

On-site · Santa Clara, California, United States

Type
Full Time
Level
Senior Level
Education
Doctorate Or Professional Degree
Company size
Enterprise

Job Summary

Complete responsibility for PCIe/Ethernet PHY Validation in post-silicon environment. Define, document, execute and report the overall PHY validation/test plan for Marvell storage devices. Lab-based silicon bring-up and unit test execution focused on PCIe Physical and PCS layer hardware and firmware functionality, while also extending to the protocol layer of the PCIe stack. Perform high speed signal validation and analysis using various test equipment to measure Eye diagram/Jitter/BER. Analyze and debug issues on Phy protocol of storage interface ( SATA, SAS, PCIe, Ethernet ). Troubleshoot failing tests with diagnostics, software tools, hardware analyzers, oscilloscopes, meters, logic/protocol analyzers. Lead collaborative technical discussions to drive resolution on technical issues. Work with cross-functional teams and external vendors to debug post-silicon and/or customer issues related to PCIe PHY. Work closely with customers to address design issue and debug failure cases. Note: We welcome candidates at various experience levels for this role and offers will align with the level.

Required Qualifications

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10+ years of related professional experience OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience
  • Strong understanding of high-speed SERDES, equalization technique and PCIe/Ethernet protocols
  • 5+ years experience with High Speed IO testing, debugging and validation
  • 5+ years of direct experience in SERDES characterization/design
  • In depth knowledge of SERDES interface using NRZ and PAM4 signaling for Ethernet and PCIe interfaces, knowledge of relevant Ethernet standards (e.g., 10GbE, 100GbE, 400GbE) is a plus
  • In depth working knowledge of test equipment used for SERDES characterization (Scope, BERT, Network analyzer etc.)
  • Deep understanding of high-speed electrical signaling principles, differential signaling and mixed-signal designs
  • Experience in Python programming language for automation framework development, as well as mathematical programming such as Matlab
  • Critical thinking and problem-solving attitude and ownership of the group’s results
  • Excellent verbal and written communication skills
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$151k – $226k / yr

Principal SerDes Validation Engineer · Marvell Semiconductor

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