Principal Package Design Engineer
$200,000–$240,000 year
HybridSan Jose, California, United States
Job Summary
Lead design, development, and qualification of advanced semiconductor packaging solutions including flip-chip, chip embedding, wafer-level, panel-level, 2.5D/3D, SiP, and heterogeneous bonding architectures. Define package architecture based on electrical, thermal, mechanical, and cost requirements while performing signal integrity, power integrity, thermal, and mechanical stress simulations. Drive OSAT and vendor strategy for new product introductions, oversee layout reviews and stack-up definitions, and develop assembly flows for manufacturing partners. Resolve packaging issues during NPI and production ramp, optimize yield through failure analysis and DOE planning, and mentor junior engineers on design rules and process documentation.
Required Qualifications
- MSc or PhD degree in Electrical Engineering, Materials Science, Mechanical Engineering, Chemical Engineering, or a related field
- 5+ years of experience in advanced semiconductor packaging or advanced electronics packaging and system integration
- Strong hands-on knowledge of advanced packaging technologies, materials, assembly processes, and application system integration as they apply to AI infrastructure and data center power management
- Deep understanding of thermal, mechanical, and electrical interactions in package design
- Extensive, hands-on model setup, simulations, and analysis
- Strong background in CAD and simulation tools
- Experience with package reliability testing and qualification standards
- Experience working with OSATs, substrate vendors, assembly houses, and semiconductor supply chains
- Proven ability to troubleshoot packaging failures, drive root cause/corrective action, and demonstrate strong project leadership and cross-functional communication skills
- Master's or PhD in a relevant engineering discipline
- Experience with power semiconductor devices and packaging including Si/SiC/GaN MOSFETs, Power Modules, Intelligent Power Modules, and their applications in consumer, industrial, automotive, and high-performance computing markets
- Experience with power products in high-performance computing, AI/ML hardware, or mobile products
- Hands-on experience with tools for package design and simulation such as: Cadence Allegro Package Designer, SolidWorks, ANSYS, COMSOL, JMP / Minitab
- Knowledge of JEDEC standards, IPC standards, and semiconductor qualification methods
- Experience in W2W, D2W, D2D 3D heterogeneous integration and chiplet-based packaging
- Advanced package concept engineering and design
- Materials selection and development
- Thermal and mechanical simulations and analysis
- Failure analysis & reliability engineering
- Design for Manufacturability (DFM/DFX)
- Process development & supplier collaboration
- Technical leadership & problem-solving
- May require occasional travel to supplier, OSAT, or design/manufacturing/R&D sites
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