Principal IP verification engineer
On-site · Bengaluru, Karnataka, India
Bengaluru, Karnataka, IndiaOn-siteFull TimeSenior LevelNot SpecifiedEnterprise
Type
Full Time
Level
Senior Level
Education
Not Specified
Company size
Enterprise
Job Summary
Principal IP verification engineer responsible for developing and executing verification plans for memory controllers and interconnect IPs. Build scalable SystemVerilog/UVM-based verification environments with reusable components (agents, monitors, scoreboards). Own end-to-end IP verification sign-off and drive high metrics for functional and code coverage. Manage regressions and debug failures, collaborating closely with design teams to resolve issues.
Required Qualifications
- 10+ years of experience
- Strong experience in SystemVerilog, UVM, and Verilog
- Good understanding of Functional verification methodologies
- Assertions (SVA) and coverage
- Understanding of interconnect protocols such as AXI, AHB, CHI and PCIe
- Experience debugging complex RTL and testbench issues
- Formal verification is an added plus
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