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RTXPosted 1 month ago

Principal FPGA/ASIC Verification Engineer (Onsite)

$107,500–$204,500 year

On-siteFort Wayne, Indiana, United States

Full TimeSenior LevelDoctorate Or Professional DegreeEnterpriseAEROSPACE

Job Summary

Design and implement verification testbenches for RTL blocks using SystemVerilog and VHDL, including architecture design with OVM/UVM, test plan creation, and coverage tracking. Lead project verification teams by breaking down work, planning activities, and reporting status while recommending tools for continuous improvement in the ASIC/FPGA verification flow. Contribute to engineering estimates for new program pursuits and drive the development of signal processing and information assurance technologies for Mission Systems programs.

Required Qualifications

  • Active and transferable U.S. government issued security clearance
  • U.S. citizenship
  • Degree in Science, Technology, Engineering or Mathematics (STEM)
  • Minimum 8 years prior relevant experience
  • Advanced Degree in a related field
  • Minimum 5 years of experience (if holding an Advanced Degree)
  • Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment
  • At least 4+ years experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment
  • Demonstrated ability to work independently and lead and/or mentor junior engineers within a team environment
  • Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog
  • 4+ years of experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog)
  • Experience using revision control systems such as Git or Subversion to manage source code, collaborate across engineering teams, and maintain configuration integrity
  • Onsite work location in Fort Wayne, IN

Desired Qualifications

  • Experience with ASIC/FPGA lab validation and debug using standard lab equipment
  • Familiarity with DFT, manufacturability, and production test concepts
  • Proficiency with Unix/Linux environments
  • Scripting or software development skills in C, C++, Python, or Perl
  • Industry-standard ASIC/FPGA simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado
  • Strong written and verbal communication skills
  • Ability to work independently and collaboratively in fast-paced, multidisciplinary engineering environments

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