Principal Engineer - Design Verification
On-siteHyderabad, Telangana, India
Job Summary
Drive Verification R&D team execution and best-in-class methodologies for advanced microcontroller and microprocessor design. Collaborate with system architects to verify high-level specifications and work with EDA vendors to deploy next-generation tools. Build strong collaboration with RTL, DFT, digital IP, PD, Design Enablement, Emulation, and Validation teams to achieve project milestones. Promote continuous improvement to design techniques ensuring 'Zero Defect' chips. Collaborate with SMEs and key leaders in architecture, systems, emulation, SoC design, software, physical design, and IP teams to influence overall design improvements and verification methodologies. Responsible for developing detailed Technical SoC verification execution plans, progress reports, and tracking milestones, managing technical risks, and providing mitigations to meet schedule, quality, and cost commitments. Complete ownership for SoC verification quality sign-offs ensuring all deliverables for team hand-offs. Drive best-in-class verification methodologies collaborating with global internal and external SMEs and developing adoption and compliance processes.
Required Qualifications
- Bachelor's or master's degree in electronics engineering
- 14+ years of experience in SoC Verification domains
- working knowledge of industry standard EDA toolkits
- Experience in Microcontroller and Microprocessor architecture & Interconnect
- Experience in protocols like AHB/AXI, Memory (ROM, RAM, Flash, MRAM) and memory controllers
- Advanced knowledge of Verilog, System Verilog, C/C++, Shell
- Proven experience in testbench design and development using UVM methodology for IP/Subsystem and SOC
- High proficiency in Metric Driven Verification concepts, functional and code coverage
- Expertise in directed and constrained random methodologies
- Good knowledge of formal verification methodologies and assertions
- Experience with debugging of designs pre- and post-silicon, in simulation and on the bench
- Must have worked on complex, multi-core SoC's with extensive interconnects and a large range of peripherals
- Fair domain knowledge of clocking, system modes, power management, debug, security and other architectures
Desired Qualifications
- Good knowledge in scripting like Perl, TCL or Python
- Excellent written and verbal communication skill
- Exposure to formal verification and hybrid formal-simulation flows
- Experience with low-power verification
- Familiarity with Medium-speed or communication IPs, such as: CANXL, CANFD, LINFLEX, UART, FLEXRAY
- Interconnect fabrics
- Security, debug, or safety-critical IPs
- Experience delivering reusable, production-quality VIPs used across multiple SoCs
Hiring someone like this?
Get your role in front of qualified candidates on Sorce.