Principal Design Automation Engineer
$176,000–$298,000 year
On-siteSan Jose, California, United States
Job Summary
Drive NAND circuit development through design automation, agentic circuit-design enablement, and environment transition. Implement core Xpath, Ypath, and Array design during project execution, integrating schematics and validating performance via block and chip-level simulations. Develop and productize AI/LLM-assisted flows for environment setup, guided debug, intelligent corner planning, and automated schematic/layout checks. Serve as technical authority across analog and core teams, solving sophisticated problems at the intersection of circuit behavior, modeling, and automation reliability. Partner with multi-functional teams to align tooling with breakthrough needs, ensuring automation choices support manufacturability and time-to-market.
Required Qualifications
- MS (PhD preferred) in electrical engineering
- 8+ years of NAND design relevant proven experience
- proficient knowledge of Nand Flash memory read, program and erase algorithms
- Proficiency in analog/mixed signal circuit design (page buffers, block selectors, Xdecoder, Ydecoder, bias table and waveforms, PDNs, level shifters, charge pumps, op amps, DACs, ADC, linear regulators, oscillators, bandgap, IO buffers, RTL, Verilog)
- Proficiency in analog/mixed signal circuit layout (page buffers, block selectors, Xdecoder, Ydecoder, bias table and waveforms, PDNs, level shifters, charge pumps, op amps, DACs, ADC, linear regulators, oscillators, bandgap, IO buffers, RTL, Verilog)
- Proficient fundamentals in semiconductor and device physics and analog/mixed-signal circuit design
- An understanding of semiconductor reliability issues including CHC, NBTI, stress, and snapback, as well as Electromigration (EM) and IR analysis
- Proficiency in circuit verification and optimization, layout planning, parasitic extractions of the circuits, experience guiding layout
- Strong understanding of circuit design verification flows, including block-level, subsystem-level, and full-chip simulations, corner management, PVT/mismatch analysis, and results qualification
- analog and digital simulators such as HSPICE, Fast SPICE, and Verilog Proven
- Proficiency in Python for engineering automation, including development of maintainable scripts, libraries, or frameworks that collaborate with EDA tools for simulation control, data extraction, regression management, or reporting
- Proficient with Cadence design, LVS/DRC tools and UNIX
Desired Qualifications
- MS (PhD preferred)
Hiring someone like this?
Get your role in front of qualified candidates on Sorce.