Physical Design Intern
HybridHo Chi Minh City, Ho Chi Minh City (HCMC), Vietnam
Job Summary
Assist in the semiconductor RTL-to-GDSII flow by performing floorplanning, block-level placement, and routing to meet aggressive power, performance, and area goals. Run Design Rule Checks and Layout Versus Schematic verifications to ensure designs meet foundry manufacturing requirements, while analyzing cross-talk, noise, and IR drop. Write and debug Python, Tcl, and Perl scripts to automate data analysis and streamline the design flow. This third-year or final-year student role involves onsite work for four days per week within the Silicon and Platform Engineering Group, which delivers breakthrough silicon and platform solutions.
Required Qualifications
- Third-year or Final-year student currently pursuing a Bachelor's degree in Electrical Engineering, Computer Engineering, or VLSI Systems or a closely related field (Physics, Maths)
- Be able to work onsite for 4 days per week
- Be able to commit to at least a 6-month internship program
- Strong verbal and written communication skills in English
- Fundamental understanding of semiconductor device physics, analog circuit theory, or digital VLSI design concepts
- Familiarity with UNIX/LINUX operating systems
- basic programming skills
Desired Qualifications
- Exposure to industry EDA tools (Cadence Innovus/Virtuoso, Synopsys ICCII/Fusion, Calibre) is a strong plus
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