Physical Design Engineer - SOC
On-site · Bengaluru, Karnataka, India
Job Summary
The Physical Design Engineer - SOC role involves complex SOC top physical implementation for next-generation SOCs, focusing on mobile application processors and modem sub-systems. Responsibilities include synthesis, place and route, timing and physical signoffs, with a strong emphasis on timing closure of complex designs. Candidates are expected to be power users of industry-standard tools and should possess scripting skills in Perl/Tcl. Experience in deep sub-micron technologies (8nm/5nm) and issues related to multiple voltage and clock domains is essential.
Required Qualifications
- 5+ Years of experience in SOC Physical Implementation
- Hands-on experience in physical design and timing closure
- Experience with large SOC designs (>20M gates)
- Familiarity with industry standard tools (ICC/DC/PT/VSLP/Redhawk/Calibre/Formality)
- Solid understanding of scripting languages such as Perl/Tcl
Desired Qualifications
- Strong understanding of timing, power, and area trade-offs
- Expertise in block level and full-chip SDC clean up
- Synthesis optimization
- Low Power checking
- Logic equivalence checking
- Familiarity with deep sub-micron designs
- Understanding of Physical Design Verification methodology
Additional Requirements
- Candidates must provide Equal Employment Opportunity considerations
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