Performance Research Engineer (multiple levels)
$180,000–$250,000 year
On-siteSan Jose, California, United States
Job Summary
Research new optimization techniques and design tools for AI-assisted performance analysis. Collaborate with the architecture team on future hardware design and work with the compiler team to evaluate code-generation quality, suggest intrinsics, and experiment with language extensions. Drive the integration of these techniques into existing performance libraries while designing and performing modeling experiments using the architecture simulator. This applied research role focuses on hardware/software co-design to build next-generation performance libraries for our energy-efficient processor platform. Candidates must have hands-on software development experience with RISC, DSP, or GPU platforms and domain expertise in areas like linear algebra or machine learning.
Required Qualifications
- Hands-on software development experience working closely with hardware, including exposure to at least two RISC, DSP or GPU platforms.
- A passion for understanding and addressing performance issues that are unique to our Fabric dataflow architecture.
- Experience with framework and library design, particularly within resource constrained and realtime environments.
- Experience with CUDA, HIP and/or other parallel programming models.
- The ability to lead and work independently.
- A collaborative spirit, with the ability to work with and influence multiple engineering teams.
- Demonstrated ability to write, debug, and maintain low-level, C/C++, systems-level code as well as design clean interfaces and modular code.
- Actively uses AI tools to generate, optimize, and debug code.
- Familiarity with low-level programming interfaces, e.g. PTX, LLVM IR and/or MLIR.
- Experience working with HW simulation environments.
- Domain expertise in three or more of the following areas: Linear Algebra, ML, Image Processing, Video Processing, Signal Processing, Audio Processing, SDR, realtime programming, or Robotics.
- Background in performance profiling, benchmark design, or comparative hardware analysis.
- Excellent written, verbal, analytical and technical communication skills, with the ability to clearly document complex systems, lead discussions across teams, as well as the ability to drive consensus across teams.
- Minimum Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field.
- Equivalent work experience.
Desired Qualifications
- PHD preferred.
- Some experience working on compiler development.
- Some experience working with high-performing HW architecture teams.
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