Package Design Engineer
On-site · Singapore, Singapore
Singapore, SingaporeOn-siteFull TimeMid LevelMasters DegreeSemiconductor SoftwareEnterprise
Type
Full Time
Level
Mid Level
Education
Masters Degree
Company size
Enterprise
Industry
Semiconductor Software
Job Summary
Broadcom seeks an experienced Package Design Engineer to own ASIC package designs (layout/routing) for flip-chip-BGA packages supporting high-speed SerDes, RF/microwave ADC/DAC, DDR, and related high-frequency structures. The role involves impedance matching, crosstalk, signal and power integrity, manufacturability, reliability, and thermal considerations in collaboration with a global R&D team, designing SerDes at 112G+ and enabling AI, networking, HPC, and 5G base stations.
Required Qualifications
- B.Eng (EE/EEE) or similar field and 5+ years’ experience in flip-chip-BGA package design, including high-speed SerDes
- M.Eng (EE/EEE) or similar field and 3+ years’ experience in flip-chip-BGA package design, including high-speed SerDes
- Knowledge of package-level signal integrity and power integrity
- Cadence APD (allegro package designer) experience is preferred
- Equivalent tool is OK
- Cooperate with world-wide team
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