ML ASIC Design Engineer
$175,000–$215,000 year
HybridMountain View Santa Clara County, California, United States
Job Summary
Translate high-level requirements into hardware features and specify microarchitectures to deliver world-class ML performance. Perform power, area, and performance exploration for digital ASIC designs, then design high-performance execution units, arithmetic circuits, and programmable engines. Collaborate with researchers, architects, and verification teams to ensure functional correctness and optimize system-level compute architectures for maximum performance. This role reports to the Senior Staff Silicon Engineer on a hybrid schedule within Waymo's Compute Team, which builds the compute platform for the fully autonomous Waymo Driver.
Required Qualifications
- BS degree in Computer Engineering or equivalent practical experience
- 5+ years of industry experience with SystemVerilog, ASIC RTL design and microarchitecture
- 3+ years designing and specifying microarchitectures of high performance computing cores (CPU/GPU/NPU)
- Fluency in at least one high level programming language such as Python, C++
Desired Qualifications
- Experience designing datapath elements of high performance cores (CPU/GPU/NPU)
- Experience working with Chisel (Scala) or other higher-level hardware DSL's
- Working knowledge of machine learning algorithms & how they map to hardware
- Familiarity with Synthesis and power analysis tools
- Experience working with formal tools for datapath verification
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