Lead MTS Design Verification Engineer - PCIe Controller products
HybridSofia, Sofia-Capital, Bulgaria
Sofia, Sofia-Capital, BulgariaHybridFull TimeSenior LevelBachelors DegreeMedium
Full TimeSenior LevelBachelors DegreeMedium
Job Summary
Develop testbenches and test sequences for new PCIe Controller SoftIP features, including functional coverage planning, coding, and regression suite augmentation. Monitor debug, triage, and correct the test environment and RTL design sequences while developing and supporting verification environment scripting capabilities. Requires 5-7 years of HDL logic design-verification experience with SystemVerilog and UVM, plus familiarity with PCI-Express and CXL technologies. This role involves pre-silicon RTL verification activities within Rambus's PCIe Express IP Products team in Sofia, Bulgaria, supporting a hybrid work model.
Required Qualifications
- Bachelors Degree or above in EE/CS
- at least 5-7 years prior experience with HDL logic Design-Verification
- SystemVerilog and/or UVM testbench
- Verilog/SystemVerilog logic design
- RTL familiarity/project work
- Pre-existing Experience / familiarity with one or more I/O controller technologies such as PCI-Express
Desired Qualifications
- Working experience with Python and TCL scripting languages
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