Layout Design Engineer
On-siteAustin, Texas, United States
Job Summary
Conduct layout and verification of high-performance mixed-signal CMOS Integrated Circuits using Cadence Virtuoso XL and Mentor's Calibre tools. Collaborate with design engineers to solve layout design issues, apply proactive intervention, and generate topological layouts ensuring optimal circuit performance. Design analog and mixed-signal layouts while understanding device matching, signal conditioning, and protection techniques. Manage floor planning, block assembly, and chip-level routing using assisted/automated tools. Troubleshoot LVS errors and debug design problems while applying knowledge of ESD, Latch-up, IR drop, and DFM. Requires 10+ years of IC layout experience and proficiency in layout planning and integration.
Required Qualifications
- Associates Degree in Electronic/IC layout CAD specialization or related program
- 10+ years of IC layout experience
- Ability to layout analog circuitry in a size/time constrained environment
- Understand layout techniques such as common centroid, matching, isolation, shielding, and the use of dummy devices
- Solid understanding of ESD, Latch-up, STI, WPE, electro-migration, IR drop, cross-coupling capacitance, DFM, and Antenna effect
- Ability to solve design problems while using a combination of technical skills, intuition, and creativity
- Proficiency in floor planning activities with block assembly, and block-level routing
- LVS trouble shooting and debug skills
- Proven track record of working in a fast-paced team-oriented environment
- Great teammate and works well with others
Desired Qualifications
- BS Degree in Electronics Engineering or related program
- Comfortable with multiple IC design CAD tools and foundry PDKs
- Demonstrated ability to contribute ideas for improved efficiency and automation of layout tasks
- Knowledge of analog, digital, and mixed-signal fundamentals
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