IP Development Engineer
Hybrid · Bengaluru, Karnataka, India
Job Summary
Master's-qualified engineer to develop Soft IP in VLSI/RTL using SystemVerilog; responsibilities include coding the RTL and developing microarchitectural specifications from high-level architectural specs, verifying the IP, creating testbenches, running design tools to qualify the IP to delivery standards, and creating timing collateral and waivers while supporting deployment of the IP in SoCs. Experience with functional bus protocols and IEEE test standards such as JTAG is highly beneficial. Internship experience in a leading VLSI company is preferred.
Required Qualifications
- Technical proficiency in engineering principles and tools
- Bachelor's or Master's in Electrical Engineering or related field
- 1-2 years in Soft IP development or relevant experience
- SystemVerilog RTL coding
- ability to create microarchitectural specifications from high-level designs
- experience with design and verification tools
- familiarity with bus protocols and JTAG is beneficial
- internship experience preferred
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