IP Design Verification Engineer
HybridGeorge Town, Penang, Malaysia
Job Summary
Own RTL validation for functional and design-for-test objectives by defining verification strategies, methodologies, and detailed test plans. Create Bus Functional Models to interface with the IP, monitor transactions, and verify protocol compliance. Implement and execute test cases, assertions, and functional coverage using System Verilog, while setting up and performing gate-level simulations to verify asynchronous and multi-cycle paths. Debug test failures in RTL and GLS environments, analyze coverage metrics to identify gaps, and automate pre-silicon validation flows using Tcl, Perl, or Python. Collaborate with architects, RTL developers, and system teams to resolve integration issues and maintain verification infrastructure. This role supports Intel's broader goals of ensuring robust IP design delivery.
Required Qualifications
- Bachelor's or advanced degree in Electrical Engineering, Computer Engineering, or a related discipline
- 6+ years of experience with a Bachelor's degree, 4+ years with a Master's degree, or 2+ years with a PhD
- Strong proficiency in System Verilog and verification methodologies such as OVM and UVM
- Expertise in DDR protocols, particularly LPDDR5 and DDR5, with experiences covering all stages of validation from specifications to coverage
- Skilled in RTL validation, logic design, DFx concepts, and IP microarchitecture debug methodologies
- Experience with industry-standard verification tools such as VCS, DVE, Verdi, or similar tools
- Familiarity with UNIX environments and fluency in shell scripting and C programming
Desired Qualifications
- Advanced problem-solving skills with the ability to debug simulation failures and resolve formal verification challenges
- Proficiency in automating verification processes using Tcl, Tk, Perl, and Python to improve efficiency and scalability
- Strong oral and written communication skills, with the ability to work effectively with cross-functional teams and global partners
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